![]() If VPOSW has been written to more than once during single field and writes only modified LOF-bit and later write(s) during same field restored original LOF value: don't recalculate display settings when next field starts. ![]() Previously it only made a short pulse that was unreliable. ![]() Level 7 interrupt input event now keeps NMI active until CPU detects it. Broke when STOP instruction emulation was rewritten to match real 68000 behavior. Fixed LPSTOP instruction (68060 only, Low Power STOP). CD32 state was always saved, even when no CD32 features were enabled. In some situations state save/restore support was not correct and/or not cycle accurate. Statefile save exactly when CPU was about to do memory chip bus read or write: restore skipped this pending read or write. Chipset internal delay events are now accurately saved with state files. Copper "overflow" to beginning of next field is now statefile supported. Previously blitter was force-finished if blitter was active when state was saved. Blitter state is now fully saved even if blitter is in mid-operation. If CPU was waiting for chip bus read or write (At least one cycle was stolen from CPU) when debugger was exited or GUI was entered, next CPU chip bus wait cycle was not counted. Above Agnus and Denise model selection replaces them. Removed Agnus blitter busy bug and No-EHB Denise Advanced chipset options. Autoselect = Chipset type selected from chipset panel. Previously Agnus type was used to select if A1000 Denise features/bugs were emulated. Added A1000 Denise model selection to advanced chipset (A1000 Denise without EHB and A1000 Denise with EHB). ![]() Can be used to configure larger Chip RAM size than Agnus DMA supported size. Added Agnus chip ram max size option to advanced chipset. ![]() (Except JIT which does not like non-power of two RAM sizes) 1.5M Chip RAM size is now working correctly in all configurations. ![]()
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